NVIDIA Interview Question

Two stages are added to the pipeline discussed in the earlier post to form the circuit shown below.


2. Stage A decides to send the input either to stages B-C or to stage D.
3. 35% of data from stage A is sent to stages B-C while 65% of data from stage A is sent to stage D.
4. All information given in the earlier post is applicable to this pipeline as well.

Extend the power reduction scheme that your developed in the earlier post and apply it to the new pipeline. Calculate how much power will be saved when applying this scheme to the new circuit.

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